Full-Frame (FF) CCD

This is the basic architecture of a full-frame CCD.

Frame-Transfer (FT) CCD

In general, we prefer to control exposure electronically. A mechanical shutter—like any other high-precision mechanical device with moving parts—adds complexity to the design, increases the cost of the final product, and makes the entire system more prone to failure. In battery-powered applications, the additional energy required to drive physical components is also undesirable.

The FT-CCD allows us to retain some of the advantages of the FF-CCD while requiring (nearly) no shutter. This is achieved by dividing the full-frame CCD into two equal-sized sections: one is a conventional photosensitive imaging array, and the other is a storage array shielded from incident light.

After integration, the charge packets for all pixels are rapidly transferred into the storage array, where readout then takes place. While the storage sites are being read out, the active pixels can accumulate charge for the next image, enabling frame-transfer CCDs to achieve higher frame rates than full-frame CCDs.

We say the FT architecture nearly eliminates the shutter because the shutterless design suffers from an issue known as vertical smearing. The transfer of charge packets from active pixels to storage sites is fast, but not instantaneous; thus, light reaching the sensor during vertical transfer can alter the image data.

The main drawbacks of the FT architecture are higher cost and increased area relative to image quality, since it essentially uses a full-frame sensor but halves the number of effective pixels.

The frame-transfer CCD adds a storage array to the full-frame architecture.

Interline-Transfer (ILT) CCD

The final major architectural improvement we need is the rapid transfer of integrated charge to storage regions, reducing smearing to negligible levels. Interline-transfer CCDs accomplish this by providing a network of storage (and transfer) regions adjacent to each photoactive site. After exposure, every charge packet in the sensor is transferred simultaneously into non-photosensitive vertical shift registers.

As a result, these CCDs enable electronic shuttering with minimal smearing. Like FT-CCDs, they can integrate during readout, thus maintaining high frame-rate capability. However, some smearing can occur if photogenerated charge leaks from the photoactive columns into adjacent vertical shift registers during readout. If the application does not require high frame rates, this issue can be eliminated by delaying integration until readout is complete.

Interline CCDs do not require the large storage section used in frame-transfer CCDs, but they introduce a new disadvantage: the sensor becomes a less efficient converter of photons to electrons, since each pixel site now consists of both a photodiode and part of a vertical shift register. In other words, part of the pixel is insensitive to light, generating less charge relative to the amount of light falling on the pixel area. This loss in sensitivity is greatly mitigated by adding microlenses to the sensor that focus incident light onto the photoactive region of each pixel, but these microlenses present their own set of challenges.

In the interline-transfer architecture, the storage (and vertical transfer) regions are located between the photoactive columns.